Designed, Built and tested: Engineering feats, ingenuity, lessons learned.
My Senior Project at Sonoma State University
A Power-Management System using a Microcontroller Interfaced to Solid-State MOS Switches for battery, supercapacitor, and load management, featuring a digital readout
Using a PIC18 running compiled C code, monitoring DC parameters with A/D converters, controlling high power using MOSFETs, managing voltage in a series-connected bank of voltaic cells, also a battery, and a load using the uC & support circuitry
Easily customizable for a variety of situations & applications
The Functional Description is roughly known, basic functional parts I have already defined and chosen, some subsystems I tested independently .Many component vales I just estimated such as gate-drive resistors for high-side PMOS and lossy-nes of lossy low pass on A/D inputs. I did certain calculations such as for voltage dividers, current limiters for Opto LEDs and programming 3 and 5 volts onboard Volt regulators
Starting with power components around the outside, I also include blocks depicting the microcontroller and optoisolators, the Supercap/Voltaic stack where balancing will take place, and suggest the need for onboard voltage sources. Not all nodes have been defined yet. Power in general flows Left to Right
P-Channel MOSFETs implemented as high-side switches, and an integrated Buck Converter. The 2 PMOS transistors are responsible for switching power into and out of Supercapacitor bank. The Buck interfaces the variable Voltaic bank voltage with a fixed bus voltage used for battery charging and load offset
MicroController A/D inputs, Opto-Isolators and OpAmps, parallel connection for header to LCD readout. The Opamp is for offsetting Load current in real time independent of the microcontroller, from a capacitor of indeterminite size, at BUS voltage
Here I implemented a High-Side MOS transistor as a switch to enable uC in event detected by an OpAmp (not shown) subcircuit, or supplied by the uC itself under conditions defined in the firmware
Node-Voltage Dividers & High-Side/Floating Shunt Balancers (the 4 PMOS FETs). Original design intent was Supercapacitors, but any voltaic cell can be used. Voltage setpoints implemented in C code
Lossy Low Pass filters on all the inputs to the
A/D converters. Series resistance and inductance, parallel capacitance. For ultra-low-bandwidth needs for battery voltage detection, a wide range of RLC values will work fine.
Inherent hardware-derived current-limits, one level for batt charging, the other for loading offset. The Offset /Load cancellation FET (Q4) is driven by the Opamp in the uC section, typically below hardware current-limit level
This IS that Opamp (prev image) Controls one of the output current-limit circuits, attempts to reduce batt discharge current to zero when source (ie BUS) energy is available. Analog feedback independent of uC enables an operating mode with extrermely low parasitic draw
While this circuit has the potential to be very efficient and effective, it has a phenomenally short on-time that results in very low very low operating current, being resonant it depends greatly on the magnetic core for repeatability.
Abandoning, using Opamp charge pump instead
One of my strategies is to keep High Currents to the edges as much as possible, consider all current loops & attempt to minimize loop area by running conductors counter-parallel. Make layout mimic logical function, labels in silkscreen for "breadboard" type use. 4 Layers - started with 2 layer butlarge number of vias quickly revealed need for more layers.
Not all parts are within the board outline yet. Some parts aren't even on the schematic as the schematic hasn't been finalized. As I did the layout and imagined the operation of the circuit in my head, I realized revisions were needed. Adding parts to the schematic or altering the circuit, the software facilitates transfer of these changes to the layout
Couple of more part to move into board perimeter. Developing a strategy. In general I'm trying to make all rat-lines shorter. Starting with the basic road map left to right, prioritizing high-current and noisy paths which will eventually want to run in parallel pairs to minimize loop area, continuing to place parts.
For stand-alone modules, my default strategy is top-left to bottom-right. Solar in top left, battery middle right, load bottom right. 'Circuits' like the Supercap bank, Opto ICs and uC, current loops extend like pairs of fingers into the interior of the board, ideally in loops folded into flattened ovals with zero area.
Rough layout of majority of components. Highest currents and noisiest components like the LM2596 integrated switching power supply, positioned around the outside
Start routing the high-current wide traces typically, but this is where the art really plays a big role. There may be competing priorities
Minor adjustments to the schematic can still take place, for small simple components without too much grief. This is a fairly low-speed layout, not too many critical dimensions. Parts moved necessarily un-route trace segment... but that's fine, it can be re-routed
The 4-layer PCB (printed circuit board) becomes a PCA (printed circuit assembly)
Sent the Gerber file pack and the board came back all pretty and ready to go.
I've used a mixture of thru-hole and SMT. For dividers I might want to change, I try to use thru-hole, whereas bypassing and filtering, values that shouldn't have to be edited much, routine/laundry-list parts, I try to use SMT more.
It's always easier to mount the small components when there aren't big ones restricting angles of attack. Here I've soldered some of the smallest SMT parts. L4 may be as small as an 0402 part
The white polygons indicate no copper on any layer, so you can drill through them. When there are no hard deadlines, I like to add other notes to save time referring to layout & schematic..... while planning and experimenting with prototype versions
Next, with most of the SMT loaded, I mount the other low-profile components. Ideally all 1/4W resistors before 1/2W and DIP ICs, but there's no hard and fast rule
Microcontroller goes here. I never implemented code to listen to a pushbutton switch. C can tell PIC to poll, use RB2, or could implement interrupt and the same pin would activeate INT2. Or, could be used as A/D converter to AN8.
Fully populated, hand-loaded and soldered.
Typically a few power-on reality-check voltage spot-checks have been made before getting this far. The bare minimum is measuring DC voltage from the onboard linear regs before loading the PIC18 microcontroller
Upon powering up and activating the A/D converters, I realized that the 0.05Ohm resistor (metal strip next to the TO220 device) being the shunt resistor for Supercap Current produced a voltage too low for good A/D pickup - I added a gain cell, an opamp to multiply the shunt voltage
I got rid of the resonant flyback oscillator I had been using for a negative voltage source. It required a HF transformer with 3 different windings. Now solid-state using an Opamp.
It's high-profile now, but can take up much less space than I has allocated.
The amp I had specified for the shunt resistances for measuring current to Load and net Battery current was inconvenient in the way I had utilized a quad Opamp.
I redesigned and built "surf board" style independent amps for those 2 functions.
Some snapshots of the underlying code (Download full C code in Downloads section below)
Some settings are needed to make the PIC microcontroller work in a certain way, ie for how it's connected in the circuit.
These #pragma commands tell the compiler to setup the chip a certain way; they're not actually commands executed by the chip
The #define statements are basically substitutions that happen while compiling. It's a way to name the hardware pins of the IC.
This list is a cross-reference between hardware pins and their function in my project
Another cross-reference list of values and how they'll be used.
These #define statements only take up space in the C test file; don't use up program space on the IC.
The A/D converters have many configuration parameters of their own.
I chose to just wait for a given A/D conversion to before going on to the rest of the program. Another option is to enable interrupts, so the uC can do other tasks or sleep during A/D conversion.
The sprintf function helps convert different data types like ASCII, integers or floating point values. Sometimes it produces some unexpected results, but saves a lot of time in writing code.... but it is a hefty library/subroutine compared to the fairly simple code I run.... which I know because I run a timer and sample it's value
Logic for deciding whether to charge the Supercap/Voltaic stack, and whether to run the buck converter which provides the bus voltage for load offset and battery charging.
It's a separate decision whether to use the bus voltage sending it to batter/load
Live Circuit
Solar input is required to power up the LCD. "Solar" can be provided by any voltage source. If the Solar source voltage is lower than voltaic (galvanic cell or Supercap) stack, the uC does not turn on any high power devices but does power up the LCD
Reading Solar In, Total Capacitor stack sum, and Batt Voltage. There is no batt connected now and the CapSum is still low so Batt voltage is zero. With Caps low, it doesn't try charging batt. It's saving Supercap energy for pulse loads until solar and/or supercaps are higher.
Here showing Supercap/Voltaic stack details, voltage of each of the 4 Voltaic cells, the average voltage of the 4 cells, their current (3.122A) and batt charger mode "1f" for "Float" and a tau, and some debug info
The first set of hardware mounted on PCB board for this project
Photo taken during proof-of concept phase in the senior design lab at Sonoma State. I first built the circuit as a one-off on generic grid board and a PCB I had previously designed for a different purpose (my "RPC1" board, a Buck Converter)
This 12V battery turned out to be dead. The Bus voltage I utilize can be trimmed to desired value, and target battery voltage is software-defined.
While this did work, it was too messy to present as our final.
Also, to lend credibility to the proof, I set out to repeat.
Simulations are valuable, but rather than sit behind a computer, I trusted my instincts and threw the parts together. Then I observed the measurements that resulted.
Supercaps are going to be mounted between the large parallel solder-component-leads
Optoisolator IC (IC socket) drives the Pch MOSFET from signals provided by the uC. Red LEDs signifiying "balance call" signal.
This is a "small" old-fashion transformer, is much bigger than strictly necessary for the few mA I need for PMOS gate drives. Later I eliminated this in favor of a solid-state charge pump.
Red light implies one of the supercaps being discharged by the balancer circuit.
For development, it was good to have hardware disable for balancing, because when it was uncalibrated, it would cause severe UN-balancing
The generic grid board required more wires connecting multiple proverbial "point A to point B", but looked "cleaner" whereas the Buck Converter PCB used for the power control section had a lot of useful traces.... but somehow ended up looking more "messy"
For the sake of neatness, it's best to start out with far more board area than you think is minimally necessary. Neatness then translates to ease of assembly and troubleshooting
These are the inductors and resistors that form the lossy-lowpass filters to the inputs of the A/D converters
3 PC boards and an LCD display controlled by the PIC18 microcontroller
Test setup
During firmware development, there are many cases of "random" data. The !1 meant something at the time, as did the 88
With so much information, 2-line ends up feeling cramped.
Amps and Volts in from solar, Batt Volts and Batt net current, Load current.... time-multiplexing becomes necessary